]> git.eshelyaron.com Git - emacs.git/commit
Improve VHDL mode highlighting
authorCyril Arnould <cyril.arnould@outlook.com>
Wed, 3 May 2023 19:40:18 +0000 (19:40 +0000)
committerEli Zaretskii <eliz@gnu.org>
Fri, 5 May 2023 05:45:29 +0000 (08:45 +0300)
commita2d4cd06f455e815c0c01434458b810367a66c92
tree987c6697823d3d5b1bd3230cbb6d2de2f1258596
parent2f3a514b6db5e0d0453c56a4f201088ea99d5139
Improve VHDL mode highlighting

* lisp/progmodes/vhdl-mode.el (vhdl-compiler-alist): Differentiate
between ModelSim errors, warnings, and notes when highlighting
them.  Add a new entry for Xilinx Vivado.  (Bug#63251)

Copyright-paperwork-exempt: yes
lisp/progmodes/vhdl-mode.el